A “band-gap reference” is a voltage source that provides a highly constant level of voltage. The voltage level produced by a band-gap reference is related to the quantum physics of the semiconductor out of which it is constructed. The band-gap reference is required to not only have high accuracy but also stability under temperature change.
An exemplary circuit of band gap reference 100 for generating band gap voltage (VBG) is illustrated in FIG. 1 (Prior Art). The circuit 100 generates a band-gap voltage that is given by the following equation:
                                          V            BG                    =                                    V              BE                        +                                          (                                                                            2                      ⁢                                              R                        2                                                              +                                          R                      1                                                                            R                    0                                                  )                            ⁢              Δ              ⁢                                                          ⁢                              V                BE                                      +                                          (                                                                            2                      ⁢                                              R                        2                                                              +                                          R                      1                                                                            R                    0                                                  )                            ⁢                              V                OFF                                                    ⁢                                  ⁢                                  ⁢                  where          ,                                          ⁢                      VBGSlope            =                                          V                BE                            +                                                (                                                                                    2                        ⁢                                                  R                          2                                                                    +                                              R                        1                                                                                    R                      0                                                        )                                ⁢                Δ                ⁢                                                                  ⁢                                  V                  BE                                                              ,                                          ⁢                      VOFFSET            =                                          (                                                                            2                      ⁢                                              R                        2                                                              +                                          R                      1                                                                            R                    0                                                  )                            ⁢                                                          ⁢                              V                OFF                                                                        (        1        )            
VBE is a base-to-emitter voltage of one of the PNP transistors 103, and it has a negative temperature co-efficient, that is, it decreases as temperature increases
ΔVBE is the difference of the base-to-emitter voltages of the two PNP transistors (101 and 103), and is a positive quantity with a positive temperature coefficient. It can also be derived using ΔVBE=cT ln r, where c is a constant of proportionality, T is the absolute temperature in degrees Kelvin, and r is the ratio of the collector current densities of the two PNP transistors (101 and 103). Thus we see that ΔVBE equals zero at 0 K, and increases linearly with temperature.
Here, the principle is to balance the decrease with temperature of VBE with the increase with temperature of ΔVBE so that VBG, which is a weighted sum of VBE and ΔVBE, remains constant at all temperatures. Now the rate at which VBE decreases with temperature is not equal to and generally much larger than the rate at which ΔVBE increases with temperature. Hence in equation (1) ΔVBE is weighted by a large positive number. The weight for ΔVBE in equation (1) is the weighted sum of two resistors (R1, which is the common value of resistors 109 and 111, and R2, which is the value of the resistor 117, and divided by R0, which is the value of the resistor 107) whose values may be trimmed in order to achieve a temperature-stable VBG. There is one more term,
      (                            2          ⁢                      R            2                          +                  R          1                            R        0              )    ⁢      V    OFF  in equation (1), which is traceable to a non-ideal offset voltage VOFF generated by the error-amplifier 105.
In summary, the voltage generated by the circuit 100 may be represented as VBG=VBGSlope+VOFFSET, where the first term, VBGSlope, may vary with temperature, and needs to be set to constancy by trimming the circuit, and the second term, VOFFSET appears as a constant offset and needs to be set to zero by trimming the circuit.
During silicon testing or validation stage of chip manufacture, the resistors of the circuit 100 can be trimmed (adjusted) so that there is minimal dependence of VBG with temperature, and so that VBG has no offset that renders it inaccurate. Typically the process of trimming the circuit 100 implies the measurement of VOFFSET and VBGSlope at two different temperatures to obtain high accuracies. This process is known as two-temperature trim. The oven in which the circuit-to-be-trimmed that is being calibrated needs several minutes to reach a certain temperature. Hence two-temperature trim is a process that generally takes several minutes. It is a time-intensive process to implement two-temperature trim for multiple circuits.
Other existing methods for trimming the circuit 100 require the presence of a clock, which sometimes itself needs the presence of a band-gap reference and consume more area on the chip.
Hence, it is desirable to have an offset calibration technique for improving band gap performance.